Various Electronic Devices
Pin Name Direction Description
1 TCK Test Clock
2 GND Ground
3 TDI Test Data Input
4 GND Ground
5 TDO Test Data Output
6 VCC Power Supply
7 TMS Test Mode Select
8 TRS Test Reset

unknown connector
According to 2 reports in our database (2 positive and 0 negative) this pinout should be correct.

Is this pinout
JTAG Header for FPGA/CPLD Applications (Comcom Electronics Standard) visual pinout:
JTAG Header for FPGA/CPLD Applications (Comcom Electronics Standard) diagram
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